DOI: 10.1109/TMTT.2026.3692368   IEEEXplore: https://ieeexplore.ieee.org/document/11528179

On-Chip dual-band balanced power divider in GaAs technology.

10 Ghz and 24 GHz

The dual-band balanced power divider design methodology, based on bridged T-coils and thin-film resistors, is capable of absorbing input common-mode noise. The GaAs integrated passive design process achieves a very compact size of 3.83 × 2.61 mm, and the corresponding electrical size is only 0.128λ0 × 0.087λ0 at 10 GHz.

Compact, highly-integrated, balanced RF front ends with high immunity to environmental noise and electromagnetic interference.

>98.6% input common-mode noise is absorbed at both operating frequencies. 3.99 dB and 6.07 dB differential-mode insertion loss, 48.4 dB and 33 dB common-mode rejection is demonstrated at 10 and 24 GHz, respectively.