This letter presents a fractional-N charge-pump phase-locked loop (CP-PLL) operating at cryogenic temperatures (CT) down to 6 K. The phase-locked loop (PLL), generating signals in the frequency range around 2.28–2.68 GHz, is intended as a reference source in a microwave signal generator for a trapped-ion quantum computer operating with 9Be+ ions. Using a third-order MASH DSmodulator (DSM), the PLL achieves a highly competitive FoM of −245 dB. The circuit exhibits the highest fractional spur suppression among the recently reported cryogenic PLLs, as well as the lowest chip area.

DOI: 10.1109/LMWT.2026.3677613 IEEEXplore:https://ieeexplore.ieee.org/document/11458755