DOI: 10.1109/TMTT.2024.3422156   IEEEXplore: https://ieeexplore.ieee.org/document/10633873

Single Chip 75-110 GHz Half-Duplex T/R Front End in 40-nm GaN on SiC HEMT

W-band, 75-110 GHz

A 3-stage balanced PA with 1:2:3 staging ratios and two HEMT device sizes employed efficiently saturates the 3rd stage's 300 µm device periphery over the frequency range. A 3-stage LNA is matched in the first stage for best noise performance, and matched in the second and third stages for output power performance. A quarter-wave shunt switch avoids compression in transmit mode.

Communications, imaging and sensing. Integration with phase shifters in phased arrays.

Transmitter: >17 dB small signal gain; >15 dB large signal gain; >25 dBm Pout, 29 dBm Pout at 92 GHz. Receiver: 16-22 dB small signal gain; 4-6.5 dB de-embedded noise figure (NF); 5.2-7.8 dB NF embedded. Mode switch: 15-20 db Isolation; 1-1.5 dB insertion loss.