A 292.2-to-321.4-GHz Synchronized Source Generator With −58.7-dBc Spurious Tone and 136.7-fsrms Integrated Jitter in 22-nm CMOS Technology

A 292.2-to-321.4-GHz Synchronized Source Generator With −58.7-dBc Spurious Tone and 136.7-fsrms Integrated Jitter in 22-nm CMOS Technology

clockVolume: 73, Issue: 10, October 2025

authorYuan Liang

A 292.2-to-321.4-GHz Synchronized Source Generator With −58.7-dBc Spurious Tone and 136.7-fsrms Integrated Jitter in 22-nm CMOS Technology

Abstract
DOI: 10.1109/TMTT.2025.3571451   IEEEXplore: https://ieeexplore.ieee.org/document/11022965    
Device
Cascade synchronized source generator with a millimeter-wave (mmW) phase-locked loop )(PLL) and an 8x frequency multiplier chain in 22 nm CMOS technology
Spectrum
292.2 to 321.4 GHz
Novelty
A complimentary ripple-neutralized phase detector (CRN-PD) in the PLL is implemented for ripple compensation during phase alignment to significantly reduce the spurious tone level. A novel calibration scheme captures the optimal locking point of the dynamic-latch-based prescaler to eliminate the need for external tuning.
Application
Integrated components and circuits for spectroscopy imaging, broadband wireless links, and THz radar and sensing
Performance
-86.1 dBc/Hz phase noise at 1 MHz offset at 307.7 GHz, 136.7 fs RMS integrated jitter for 100 MHz integration range; -13.2 to -8.6 dBm Pout, -58.7 dBc spurious PLL tone normalized to 320 GHz; -225.6 to -264.4 figure of merit (FoM) depending on the method to calculate; 216.2 to 249.5 mW power consumption.