Jack Brunning

Jack Brunning Graduated in EE at the University of Bradford, UK.

He joined Filtronic COMTEK involved in the development of base station Rx/Tx modules before joining Macom Tech, Ireland developing passive filters for CATV applications. From 2009 to 2012 Jack Brunning worked for Sylatech, UK where he was responsible for the design and development of waveguide components for commercial, space and military end-use. From 2013 to 2019 he joined SARAS Technology, UK focussed on the detailed design, modelling and development of power amplifiers. This included LDMOS, GaN and GaAs based technologies in a wide range of architectures, frequencies and power levels. Whilst at SARAS he also served as the industrial power amplifier specialist in projects such as the Horizon 2020 high efficiency 5G power amplifier project and provided mentorship to Early Stage Researchers in the modelling and design of load modulated PA architectures and concepts. From 2019 to 2021 he joined Ampleon, NL (previously NXP) as a Principal Design Engineer responsible for the modelling, design and load-pull characterization of discrete LDMOS power transistors for macro base stations in the 40 to 80W average power range, specifically for Doherty architecture power amplifiers in the sub 6GHz bands.

He is currently a Design Engineer with Spirit Semiconductor, UK an early phase start-up focused on the development of GaN-based 5G mMIMO power amplifiers. Specifically, the modelling and design of load modulated architectures and evaluation of semiconductor technologies.

In addition to international industry experience he has published and co-authored work with the IET, ARMMS and IEEE as well as contributing to industry journals such as Microwave journal.

Current areas of interest are high-efficiency load modulated power amplifiers, device modelling and PA design by waveform.