Hossein Hashemi (M’99–SM’08) received the B.S. and M.S. degrees in electronics engineering from the Sharif University of Technology, Tehran, Iran, in 1997 and 1999, respectively, and the M.S. and Ph.D. degrees in electrical engineering from the California Institute of Technology, Pasadena, CA, USA, in 2001 and 2003, respectively. In 2003, he joined the Ming Hsieh Department of Electrical Engineering, University of Southern California (USC), Los Angeles, where he is currently a Professor, Ming Hsieh Faculty Fellow, and Co-Director of the Ming Hsieh Institute. His research interests include electrical and optical integrated systems. Dr. Hashemi currently serves as an Associate Editor for the IEEE JOURNAL OF SOLID-STATE CIRCUITS, and on the Technical Program Committees of the IEEE International Solid-State Circuits Conference (ISSCC), IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, and the IEEE Compound Semiconductor Integrated Circuits Symposium (CSICS). He was a Distinguished Lecturer for the IEEE Solid-State Circuits Society (2013–2014), a Guest Editor of the IEEE JOURNAL OF SOLID-STATE CIRCUITS for the October 2013 and December 2013 issues, and the associate editor for the IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—PART I: REGULAR PAPERS (2006–2007) and the IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—PART II: EXPRESS BRIEFS (2004–2005). He was the recipient of the 2008 Defense Advanced Research Projects Agency (DARPA) Young Faculty Award, the National Science Foundation (NSF) CAREER Award, and the USC Viterbi School of Engineering Junior Faculty Research Award (2008). He was recognized as a Distinguished Scholar for the Outstanding Achievement in Advancement of Engineering by the Association of Professors and Scholars of Iranian Heritage (2011). He was a corecipient of the 2004 IEEE JOURNAL OF SOLID-STATE CIRCUITS Best Paper Award for “A fully-integrated 24GHz 8-element phased-array receiver in silicon” and the 2007 IEEE International Solid-State Circuits Conference (ISSCC) Lewis Winner Award for Outstanding Paper for “A fully integrated 24GHz 4-channel phased-array transceiver in 0.13mm CMOS based on a variable phase ring oscillator and PLL architecture”.