Biography
Chenhao Chu received the M.S. degree (Hons.) in electronic information engineering from the City University of Hong Kong (CityU), Hong Kong, China, in 2017, and the Ph.D. degree in electronic engineering from the University College Dublin (UCD), Dublin, Ireland, in 2022.
He is currently an Established Researcher with the Integrated Devices, Electronics, and Systems (IDEAS) Group, Swiss Federal Institute of Technology Zurich (ETH Zurich), Zurich, Switzerland. Since July 2025, he has been serving as a Lecturer at the Department of Information Technology and Electrical Engineering (D-ITET), ETH Zurich. His research interests include AI/ML-assisted RFIC design, silicon/III-V circuit co-design for heterogeneous integration, energy-efficient RF/mmWave/sub-THz integrated circuits, and antenna-in-package technologies for phased arrays.
Dr. Chu has received three awards in the IEEE Microwave Theory and Technology Society (MTT-S) High-Efficiency PA Student Design Competition (HEPA-SDC): First Place at the 2022 IEEE Radio and Wireless Week (RWW 2022), Second Place at the 2021 IEEE International Microwave Symposium (IMS 2021), and Third Place at IMS 2022. Two of his first-authored papers in IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES (TMTT) were recognized among the journal’s “Most Popular and Downloaded Papers from 2022 to 2023.” He has also received the IEEE SSCS Open-Source Ecosystem “Code-a-Chip” Travel Grant at ISSCC 2026, and the Best Student Paper Award (First Place) at the 19th Royal Irish Academy/International Union of Radio Science (RIA/URSI) Research Colloquium on Radio Science and Communications in 2022. He serves as an Affiliate Member of the IEEE MTT-S Microwave High-Power Techniques Committee (TC-12) and the Microwave Materials and Processing Technologies Committee (TC17), the Vice Chair of the IEEE MTT-S Electronic Information Committee, and a Technical Program Committee (TPC) Member for IEEE IMS and RWW Conferences. He chaired the technical session “AI for Design and Optimization of RFICs and Arrays” at IEEE IMS 2025 in San Francisco, USA.