Alberto Valdes-Garcia (S’00–M’06–SM’13) received the B.S. degree (Hons.) in electronic systems engineering from the Monterrey Institute of Technology, Toluca, Mexico, in 1999, and the Ph.D. degree in electrical engineering from Texas A&M University, College Station, TX, USA, in 2006. In 2000, he joined Motorola Broadband Communications, Nogales, Mexico, as an RF Design Engineer. In 2006, he joined IBM Research, Yorktown Heights, NY, USA, where he is currently a Principal Research Staff Member, Manager of the RF Circuits and Systems Group. His current research work is on mmWave systems for communications and imaging applications. In 2013, he was an Adjunct Assistant Professor with Columbia University, New York, USA. He holds more than 65 issued U.S. patents and has authored or co-authored more than 100 peer-reviewed publications. He is a Co-Editor of the book 60 GHz technology for Gbps WLAN and WPAN: From Theory to Practice (Wiley, 20011). Dr. Valdes-Garcia is the winner of the 2005 Best Doctoral Thesis Award presented by the IEEE Test Technology Technical Council. He is the recipient of the 2007 National Youth Award for Outstanding Academic Achievements, presented by the President of Mexico, a co-recipient of the 2010 George Smith Award presented by the IEEE Electron Devices Society, a co-recipient of the 2017 Lewis Winner Award for Outstanding Paper presented by IEEE International Solid-State Circuits Conference, and a co-recipient of the 2017 IEEE Journal of Solid-State Circuits Best Paper Award. Within IBM, he has been twice a co-recipient of the Pat Goldberg Memorial Award to the best paper in computer science, electrical engineering, and mathematics published by IBM Research (2009 and 2017). He was inducted into the IBM Academy of Technology in 2015 and was recognized as an IBM Master Inventor in 2016 and 2019. He served in the IEEE 802.15.3c 60 GHz standardization Committee, from 2006 to 2009. Since 2009, he has been serving as a Technical Advisory Board Member with the Semiconductor Research Corporation, where he was a Chair of the Integrated Circuits and Systems Sciences Coordinating Committee, in 2011 and 2012, respectively. Since 2016, he has been serving as a member for the IEEE MTT-S Microwave and Millimeter-wave Integrated Circuits Technical Committee, where he serves as Chair since 2020. In 2013, he was selected by the National Academy of Engineering for its Frontiers of Engineering Symposium.
This presentation first motivates the need for scaled phased arrays and outlines key challenges for their implementation. Design trade-offs are then discussed for important aspects such as beamforming architecture, module-level realization with antennas and packaging, and digital control. An overview of recently reported scaled arrays is provided and key trends are analyzed. Two recently introduced scaled 64-element dual polarized phased array designs are then reviewed as implementation examples. (1) A phased array transceiver module operating at 28-GHz supporting 5G applications, and (2) TX and RX phased arrays operating at 94-GHz suitable for backhaul and imaging applications. An outlook for future opportunities with phased array scaling is provided.