A 272–341-GHz Integrated Amplifier-Frequency-Doubler Chain in 65-nm CMOS
by Jae-Sung Rieh
Abstract: This letter presents a 300 GHz wide-band amplifier-frequency-doubler chain (AFDC) in 65-nm CMOS. A novel combination of series and stub transmission lines with a large DC blocking capacitor achieves superior broadband impedance matching at the output of the frequency doubler with 70 GHz bandwidth and 3.8 dB conversion gain. This AFDC outperforms alternative approaches, and enables 6G and beyond, future remote sensing, high-spatial resolution radar and other very high data rate applications in the 300 GHz spectrum.